CD4021BE CD4021 Static Shift Register, DIP-16 IC
The CD4021BE series types are 8-stage parallel- or serial-input/serial output registers having common CLOCK and PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each register stage. Each register stage is D-type, master-slave flip-flop. In addition to an output form stage 8, "Q" outputs are also available from stages 6 and 7. In the CD4021BE serial entry is synchronous with the clock by parallel entry is asynchronous. In both types, entry is controlled by the PARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line. In the CD4021BE, the CLOCK input of the internal stage is "forced" when asynchronous parallel entry is made. Register expansion using multiple packages is permitted.
This item features:
- Medium speed operationâ¦12 MHz (typ.) clock rate at VDD â VSS = 10 V
- Fully static operation
- 8 master-slave flip-flops plus output buffering and control gating
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 ÂµA at 18 V over full package-temperature range; 100 nA at 18 V and 25Â°C
Noise margin (full package-temperature range) =
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- New and Authentic Component(s) - CD4021 Static Shift Register, DIP-16, 8 Stage
- Friendly Note: Be mindful of the many, inexpensive, counterfeits available on the market.
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